A novel sampling algorithm is presented for DSP controlled power factor correction (PFC) converters, which can successfully avoid the influences of the oscillation brought by the operational high - frequency switching in PFC circuit. The proposed sampling algorithm can greatly improve the switching noise immunity, especially when the switching frequency is above 30 kHz. Finally a PFC converter with 2kW based on the proposed sampling algorithm is implemented, and the experimental results prove the practicality of the proposed novel sampling algorithm in the analysis, design and debugging of all digital sampling circuits with switching.