文章摘要
吕栋斌, 吕方旭, 王和明, 张庚, 张金旺, 秦悦仪.面向片上互连的低功耗CNRZ5 125 Gb/s高速SerDes发射机[J].空军工程大学学报:自然科学版,2022,23(2):83-89
面向片上互连的低功耗CNRZ5 125 Gb/s高速SerDes发射机
A Low Power and 125 Gb/s High Speed SerDes Transmitter Using CNRZ5 for On Chip Interconnect
  
DOI:
中文关键词: 相关非归零编码  发射机  串并转换  预编码的SST驱动  4∶1合路器
英文关键词: CNRZ  transmitter  series parallel conversion  pre-coded SST driver  MUX 4∶1
基金项目:国家重点研发计划(2018YFB2202300)
作者单位
吕栋斌, 吕方旭, 王和明, 张庚, 张金旺, 秦悦仪 1.空军工程大学防空反导学院西安710051
2.长安大学经济与管理学院西安710061 
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中文摘要:
      为解决高性能CPU、GPU、AI等高端芯片的片上互联(D2D)带宽低、引脚效率不高的问题,设计了一款面向超短距离传输(USR)的低功耗、高引脚效率的125 Gb/s发射机。为提高引脚效率,该电路采用相关非归零编码(CNRZ)技术;为降低发射机功耗,采用一种预编码的电压模驱动(SST)技术;为解决传统电路两级2∶1 MUX功耗大的问题,采用CMOS的4∶1 MUX。该发射机采用CMOS 28 nm工艺设计,0.9 V电压供电。仿真结果表明,基于CNRZ技术的发射机工作在125 Gb/s时,输出信号最小眼宽可达0.41 UI(1 UI=40 ps),系统功耗为1.1 pJ/bit,引脚效率由5 bit/10 wire提高到5 bit/6 wire。
英文摘要:
      In view of low bandwidth and pin efficiency in Dieto Die (D2D) of high performance CPU, GPU, AI and other high end chips, a 125 Gb/s transmitter with low power consumption with high pin efficiency for ultra short reach (USR) is proposed. To improve pin efficiency, this circuit adopts correlated non return to zero (CNRZ) encoding technology. To reduce the transmitter’s power consumption, this paper adopts a precoding soucre series terminated(SST) driver technology. To solve the problem of high power consumption of traditional two stage 2∶1 MUX, this paper adopts a CMOS 4∶1 MUX technology. This transmitter is designed with 28 nm CMOS technology and supplied with 0.9 V voltage. The simulation results show that when the transmitter based on CNRZ technology works at 125 Gb/s, the minimum eye width of the output signal can reach 0.41 UI (1 UI=40 ps), and the system power consumption is 1.1 pJ/bit, the pin efficiency increases from 5bit/10wire to 5bit/6wire.
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